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Professional Development Courses

Half day educational courses are led by internationally respected professionals with extensive experience in the subject area. Course instructors deliver focused, in-depth presentations on topics of current importance to the industry, based on their research and industry experience. Professional Development Courses are application oriented and structured to combine field experience with scientific research to solve everyday problems. All courses are scheduled as LIVE, in-person classes.

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1:30pm - 5:00pm

Monday, October 9

PDC1: Artificial Intelligence – Opportunities, Challenges & Possibilities

Jennie Hwang, Ph.D., H-Technologies Group

George Karniadakis, Ph.D., Brown University & MIT

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As moving into Artificial Intelligence (AI) era, the explosion of new AI tools and platforms is remaking our daily lives and every aspect of workplace including research, engineering, design, manufacturing and management across all industries from semiconductor and printed circuit board design to life sciences and new material design. Even not being an AI technologist, staying in the core knowledge zone is a viable strategy to remain proficient and competitive in the workplace. In light of the transformative potential of AI technologies, this short course offers a holistic overview of AI with the goal to spur innovative ideas and inspire new vistas to capitalize the sound benefits of AL and maximize on-job efficiency and effectiveness. The recent emergence of OpenAI's GPT, Generative AI and conversational AI makes the awareness of the development of AI-related products, use cases and “possible” future become more crucial to the on-job performance. All industry sectors are expected to reorient around AI; the ability to balance between the AI’s omnipotent power and its downsides is key to leveraging AI as virtuous tools. Businesses will distinguish themselves by how well they use the tools and how reliable and safe the designed tools can deliver. This course will map out AI landsacpe including manifold perspectives on the current and future of AI development and deployment. The key components behind the AI technologies including machine learning (ML), deep learning (DL), Neural Networks (NN), Internet of Things (IoT), digital twins, predictive modeling and ChatGPT-led AI boom will be outlined. AI with justified confidence and trust will also be highlighted. There are no required prerequisites; join us in this defining moment of AI.

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PDC3: Best Practices
for Improving Manufacturing Productivity

Phil Zarrow, ITM Consulting

Jim Hall, ITM Consulting

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You have the responsibility and resources to improve the productivity of an assembly operation….what do you do? This course drives awareness and solutions to the adverse impact that non-optimal assembly practices and processes have on the product quality and financial success of electronic assembly businesses. A comprehensive perspective on problem issues is developed for the most currently critical electronic assembly process, materials (both existing and emerging), equipment, procedures, and methods. Most importantly, practical solutions are presented. Key issues that consistently result in assembly problems and low yields are identified and resolved.


PDC4: Reflow Profiling Simplified

Robert Rowland, Axiom Electronics LLC

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Surface mount reflow soldering is a complex and challenging process. Reflow soldering profiles should be based on the chemical and physical constraints that influence the soldering process; namely substrates, components, fluxes, solder alloys and reflow ovens. Reflow profiles should not be developed by trial and error. This workshop identifies and examines the critical material and process constraints associated with SnPb and Pb-free convection reflow soldering. Mixed alloy (SnPb/Pb-free) reflow soldering is also covered. A standardized methodology for creating reflow soldering profiles should be developed and documented. Soldering profiles are a delicate balance between time and temperature; achieving the right balance can be challenging. All time/temperature profiles are influenced by constraints associated with the substrates, components, fluxes, solder alloys and reflow ovens. These constraints should be well understood and factored into all reflow soldering profiles. This workshop covers how these constraints influence the soldering process and how this knowledge can be used to simplify the creation of convection reflow soldering profiles. The overall quality and reliability of the finished product is a key concern. One example is substrate (PCB) reliability, which has been impacted by the transition to Pb-free soldering. Other examples will be covered to address and prevent defects and reliability concerns associated with substrates, components and solder joints. Inspection and failure analysis techniques like optical inspection, dye and pry, x-ray and cross sectioning will also be discussed. A process and defect trouble shooting guide is included with the presentation.


1:30pm - 5:00pm

Tuesday, October 10

PDC5: Flex Circuit ‘Design for Manufacturing Principles’ Circuit Design, Fabrication and SMT Assembly Processing

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Vern Solberg, Solberg Technical Consulting

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This tutorial will furnish the ‘Design for Manufacturing’ principles established for flexible and rigid-flex circuit fabrication. Additionally, guidance will be presented in developing surface mount component land pattern geometry and methods for providing the physical reinforcement criteria that will contribute to ensuring quality, reliability and manufacturing efficiency. In addition, the requirements for automated SMT assembly will be defined and include detailed discussion regarding panel planning and assembly process variations for low, medium and high-volume applications. Participants will also have an opportunity to review and discuss the latest revision of IPC-2222 and PC-2223, the Sectional Design Standards for Flexible Printed Boards.

PDC6: Solder Joint Reliability – Principle and Practice

Jennie Hwang, Ph.D., H-Technologies Group

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The reliability of solder joint interconnections in chip level, packaging level and board-level is crucial to the end-use product reliability - when a single one solder joint fails, the product fails. As the number of solder joints continues to increase and the volume of each solder joint relentlessly decreases, to ensure solder joint integrity is paramount. Emphasizing on practical, working knowledge, yet balanced and substantiated with science, the course provides a holistic view of the important aspects of solder joint reliability including the critical “players” (e.g., manufacturing process, PCB/component coating/surface finish, solder alloys). Fundamentals in fatigue and creep damage mechanisms (via ductile, brittle, ductile-brittle fracture), and the likely solder joint failure modes (e.g., interfacial, near-interfacial, bulk, inter-phase, intra-phase, voids-induced, surface cracks) will be highlighted. The predictive significance for the solder alloy selection by performing a straightforward and simple test will be discussed. To withstand harsh environments, the discriminating test parameters will be outlined. The strategy to optimize stress vs. strain relationship and to further increase fatigue resistance will also be outlined. The power of metallurgy and its ability to anticipate the relative performance will be illustrated by contrasting the comparative performance vs. metallurgical phases and microstructure. The parameters to be considered to derive a universal prediction model and whether existing life-prediction models can assure reliability will be highlighted. A relative reliability ranking among commercially available solder systems including newer lead-free alloys (coined “Low Temperature Solder”), as well as the scientific, engineering and manufacturing reasons behind the ranking will be outlined. Attendees are encouraged to bring their own selected systems for deliberation.

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PDC7: Weeding out PCB Defects Prior to Assembly

Bihari Patel, BP SMT Connections Inc

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With the Lead-Free transition and green revolution changes completed at Assemblers and Fabricators to meet demands of higher densities for Printed Circuit Boards presenter will share his experiences. Global sourcing of PCBs is a reality with larger batch quantities, to prevent line stoppage and expensive rework, it is important that emphasis be placed on PCBs prior to assembly to highlight issues and prevent future issues prior to use. Ensuring quality PCBs are entering in the assembly process, resulting in higher first pass yield and reduced rework associated with PCB quality deficiency. This workshop will highlight any deficiency in PCB fabrication and ones following best practices will be exhibit their strengths against other fabricators. Will also cover key result areas in Assembly Process and Metal Core - LED PCBs their assembly challenges.

1:30pm - 5:00pm

Wednesday, October 11

PDC8: Selection Criteria of Surface Finishes for Better Reliability of Electronic Assemblies

Kunal Shah, Ph.D., Lilotree

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Reliability of next generation devices is becoming more and more critical. It has called for innovation in materials used in electronics manufacturing to realize better performance and long term sustained operations. The selection of materials is critical including at the Printed Circuit Board (PCB) level for better reliability. The right choice of surface finishes in PCBs is paramount for overall reliability of electronic assemblies. There have been reliability concerns in the electronic assemblies in terms of shelf-life, non-wettability, environmental corrosion, brittle solder joints issues, etc. The course will focus on discussing how surface finishes play critical roles in these failure modes and how the selection of surface finish is critical in minimizing these failure issues. The reliability performance of various surface finishes will be compared and discussed in terms of environmental corrosion resistance, solder joint reliability, solderability, shelf-life, etc. Moreover, the cost comparison will also be discussed among surface finish options.

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PDC9: Fan-Out, Chiplet, & Heterogenous Integration Packaging

John Lau, Ph.D., Unimicron

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Fan-out wafer/panel-level packaging (FOW/PLP) has been getting lots of tractions since TSMC used their integrated fan-out (InFO) to package the application processor for the iPhone 7. In this lecture, the following topics will be presented and discussed. Emphasis is placed on the fundamentals and latest developments of these areas in the past four years. Their future trends will also be explored. Chiplet is a chip design method and heterogeneous integration (HI) is a chip packaging method. HI uses packaging technology to integrate dissimilar chips, photonic devices, and/or components (either side-by-side, stacked, or both) with different sizes and functions, and from different fabless design houses, foundries, wafer sizes, feature sizes and companies into a system or subsystem on a common package substrate. For the next few years, we will see more implementations of a higher level of chiplet designs and HI packaging, whether it is for time-to-market, performance, form factor, power consumption or cost. In this lecture, the introduction, recent advances, and trends in chiplet design and HI packaging will be presented.


PDC11: Failure Analysis of Electronic Devices

Martine Simard-Normandin, Ph.D., MuAnalysis Inc.

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The supply chain of electronic devices is large and complex. It comprises designers, component suppliers, board manufacturers and assembly providers. When something goes wrong, the failure mechanism is not always obvious. It is the role of the Failure Analysis team to establish the link between the failure mode and the failure mechanism. Once that link is understood, the path to the solution and the responsible party for it becomes clear. In this workshop, we will review the tools of failure analysis, explaining each technique and what information it provides. Concrete examples will be used.

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